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Papers & Presentations
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Multi-Gigabit Serial Link Analysis

  • Predicting BER with IBIS-AMI models (co-authored with IBM)- DesignCon 2010
  • A Tale of Long Tails (co-authored with Huawei)- DesignCon 2010
  • When Shorter Isn't Better (co-authored with Cray)- DesignCon 2010
  • Multi-Gigabit Serial Link Analysis Using HSPICE and AMI models - SNUG 2009 Award Winner
  • Comparison of BER Estimation Methods which Account for Crosstalk - DesignCon 2009
  • Calculating Tap Weights - How to derive tap weights from a stated de-emphasis value.
  • System-level Serial Link Analysis using IBIS-AMI Models - Shanghai & Tokyo IBIS Summits, Nov 2008
  • Crosstalk Analysis of a System Based on XAUI HMZd Evaluation Backplane Data - EMC 2008
  • Exploration of Deterministic Jitter Distributions - DesignCon 2008 Best Paper Nominee
  • Multi-Gigabit Serial Link Analysis - Piecing Together a Design and Verification Strategy - SNUG Boston 2007
  • An Engineering Hat Trick - DesignCon TecPanel, 2007

High Speed Parallel Interface Analysis

  • Counting the Picoseconds: Integrating Timing, Signal and Power Integrity Analysis - DesignCon 2008
  • System Level Timing Closure using HSpice - SNUG San Jose 2007
  • Features and Implementation of High-Performance 667Mbs and 800Mbs DDRII Memory Systems - DesignCon 2005
  • Signal Integrity and Timing Analysis Simulation Reuse - DesignCon 2004
  • Establishing Pass Fail Criteria for High-Speed Digital Interfaces - DesignCon 2004
  • Beyond DDR, SiSoft and Timing Analysis of QBM Systems - DesignCon 2003
  • High-Speed Design Challenges for a 1.4Ghz Network Processor - DesignCon 2003
  • Source Synchronous Bus Design - DesignCon 2002
  • Solution Space Analysis - DesignCon 2001

Simulation Modeling

  • What's a Smith Chart? - Jan 2010
  • Scaling Impulse/Pulse responses calculated via DFT - Jan 2010
  • Converting between Voltage or Power and dB - July 2009
  • S-Parameter Reference Nodes - July 2009
  • A Simple Via Experiment - DesignCon 2009 Best Paper Award
  • Creating Broadband Analog Models for SerDes Applications - DesignCon 2009 IBIS Summit, Feb 2009
  • Demonstration of SerDes Modeling using the Algorithmic Model Interface
    (AMI) Standard - DesignCon 2008 Best Paper Nominee
  • SiSoft's IBIS-AMI Model Evaluation Toolkit - Beijing & Tokyo IBIS Summits, Sept 2007
  • IBIS-AMI Modeling Proposal Status Report - Beijing & Tokyo IBIS Summits, Sept 2007
  • IBIS-ATM Model Validation - IBIS-ATM task group, July 2007
  • IBIS-ATM SerDes Modeling Status Report - DAC IBIS Summit, 2007
  • IBIS-ATM Modeling Proposal - DesignCon IBIS Summit, 2007
  • IBIS-ATM SerDes Modeling Status Report - DesignCon IBIS Summit, 2007
  • Serial Link Modeling Terminology - IBIS-ATM Sub-committee, 2006
  • System Level Timing Closure using IBIS Models - Shanghai/Tokyo IBIS Summits, 2006
  • Can IBIS Accurately Model SSO? - IBIS Summit Oct, 2004
  • IBIS Quality Committee Update - IBIS Summit June 2003
  • Practical Use of IBIS Quality Checklist - IBIS Summit January 2003
  • IBIS Quality Committee Report - IBIS Summit October 2002
  • SPICE versus IBIS - IBIS Summit October 2002
  • IBIS Quality Committee Report - IBIS Summit June 2002
  • LVDS IBIS Models @ 1.25GHz - IBIS Summit June 2003
  • Improving IBIS Quality - DesignCon 2002
  • The Bitter-Sweet Experiences of Using IBIS Models - IBIS Summit January 2002
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