Quantum Channel Designer

 
QCD Datasheet (.pdf)                                                                                   Product Evaluation Request
 
Overview

Digital system designers are turning to high-speed serial links to increase system throughput and reduce system costs. Traditional signal integrity methods can't address the unique requirements of serial link analysis, which include simulating millions of bits worth of behavior, accurately representing broadband interconnect characteristics and modeling the equalization / clock recovery characteristics of specific SerDes IP.
SiSoft's Quantum Channel Designer (QCD) is a dedicated, system-level design and analysis environment for multi-Gigabit serial links. QCD incorporates the latest frequency-domain, time-domain and statistical techniques to provide accurate analysis of end-to-end serial link behavior. Designers capture their designs graphically and experiment with different physical layout / equalization strategies to predict how design alternatives will affect operating margins and the link's Bit Error Rate (BER).

Graphical Design Capture

Quantum Channel Designer lets designers capture channel designs graphically, combining SerDes IP blocks with a mixture of discrete elements, lossy transmission lines, sub-circuit and S-parameter blocks. Designers set up simulation experiments from the GUI by declaring design variables and values to be studied. Standards-based models for SerDes IP provide Plug and Play operation - users place TX/RX devices on their schematic and QCD exposes model settings for vendor-specific SerDes IP that can be controlled from the GUI.

Progressive Analysis

Quantum Channel Designer allows designers to trade off simulation speed versus accuracy. Network characterization models the behavior of the unequalized analog network, allowing tradeoffs in the analog channel design to be quickly evaluated. Statistical and time-domain analyses include SerDes equalization and clock recovery modeling to predict the link's end-to-end behavior. Crosstalk analysis includes the effect of aggressor signals on overall channel bit error rate.

Solution Space Analysis

Optimizing a serial link design requires evaluating dozens of design variables and their possible combinations, which can require thousands of simulations for a single set of design decisions. Quantum Channel Designer automates Solution Space Exploration by letting designers specify channel and SerDes IP parameters to be varied during analysis. QCD automatically generates the different simulation experiments, runs analysis and post-processes simulation output to extract key design metrics. Results are presented in spreadsheet format, allowing designers to mine results and quickly ascertain the channel's sensitivity to key design tradeoffs.

Channel / SerDes Co-optimization

Quantum Channel Designer analyzes how the SerDes IP and analog channel interact. Parameters for both the channel design and SerDes IP configuration can be varied independently and analyzed collectively, allowing their combined behavior to be optimized. This is superior to methodologies that analyze the passive channel in isolation, because such techniques run the risk of over-designing the passive channel and needlessly increasing system costs. Quantum Channel Designer accurately models the SerDes IP's ability to overcome passive channel impairments and allows designers to reduce costs without compromising overall design quality.

Automated Design Metrics

Running thousands of simulation experiments demands a streamlined methodology for automating analysis and comparing simulation results. Quantum Channel Designer post-processes simulation data to extract key design metrics such as insertion loss, reflection coefficient, Bit Error Rate (BER) and eye height/width. Metrics are extracted for each simulation case and presented in spreadsheet format along with the design variables that produced each case. Designers can quickly filter, sort and plot metric data to determine how different design tradeoffs affect link margins.


IBIS-AMI

Accurate modeling of a specific semiconductor vendor's SerDes IP is key to successful serial link analysis. Running simulations with generic simulation models is useful for architectural simulations, but doesn't support the detailed analysis needed to co-optimize a channel/SerDes configuration and ensure production design quality. Quantum Channel Designer uses the IBIS-AMI modeling standard to provide detailed models of SerDes IP. SiSoft has been a driving force in the development and deployment of this standard that allows detailed, accurate models of SerDes IP equalization and clock recovery behavior.
 
Repeater and Retimer Modeling
 
Repeaters and retimers allow designers to extend the electrical reach of their system enabling higher-performance on legacy backplanes. Quantum Channel Designer supports IBIS-AMI extensions that enable support of repeater and retimer simulations using IBIS-AMI models.
 

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From Our Customers:

“The combination of SiSoft’s modeling expertise and Altera’s intricate understanding of advanced transceiver technology allow us to deliver highly accurate, high-performance IBIS-AMI models to our customers.  With these models, the complex circuit components in our devices can be rapidly simulated to represent highly accurate serial link performance.”
 
Bernhard Friebe
Senior Product Marketing Manager, High-end FPGAs
Altera


Altera - IBIS Model Development