Design Kit Development

Design kits provide an out-of-the-box signal integrity, timing, and crosstalk analysis environment for performing pre-layout solutions space analysis and/or post-layout verification on targeted high-speed parallel buses and/or multi-gigabit serial links. SiSoft's experienced staff of signal integrity engineers will develop interface analysis kits to meet your requirements. These kits can be targeted for specific interfaces, ASICs, custom ICs, chip sets, FPGAs, or reference designs and leverage off the design analysis reuse capabilities of Quantum-SI.

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From Our Customers:

"We've worked with SiSoft to create IBIS-AMI models across our SerDes based PHY's in IBM technologies.  SiSoft has demonstrated continued leadership in SerDes modeling by first driving the development of the IBIS-AMI standard and then becoming the leading provider of IBIS-AMI model development, correlation and validation services."
 
Navraj Nandra, Director of Marketing, Analog/Mixed Signal IP, Synopsys


Synopsys - Leadership in SerDes Modeling
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