Design Kit Development

Design kits provide an out-of-the-box signal integrity, timing, and crosstalk analysis environment for performing pre-layout solutions space analysis and/or post-layout verification on targeted high-speed parallel buses and/or multi-gigabit serial links. SiSoft's experienced staff of signal integrity engineers will develop interface analysis kits to meet your requirements. These kits can be targeted for specific interfaces, ASICs, custom ICs, chip sets, FPGAs, or reference designs and leverage off the design analysis reuse capabilities of Quantum-SI.

In This Section:

IBIS Model Generation

Design Kit Development

Technical Staff

Signal Integrity Analysis

Technology Assessments

Interface Experience

Crosstalk Analysis

Interconnect Modeling

Timing Analysis

Power Integrity

SI Training Courses

Methodology and Product Training

Jump-Start Training for Quantum-SI

Other Sections:

SiSoft eLearning

From Our Customers:

“We have worked closely with SiSoft to develop and correlate our IBIS-AMI models to reference simulations and hardware. These IBIS-AMI models provide customers with accurate simulation results at speeds more than 100 to 1,000 times faster than traditional simulation methodologies.”

Anthony Torza, Senior Product Marketing Manager at Xilinx

Xilinx - IBIS-AMI Models - Simulation Speed