Design Kit Development

Design kits provide an out-of-the-box signal integrity, timing, and crosstalk analysis environment for performing pre-layout solutions space analysis and/or post-layout verification on targeted high-speed parallel buses and/or multi-gigabit serial links. SiSoft's experienced staff of signal integrity engineers will develop interface analysis kits to meet your requirements. These kits can be targeted for specific interfaces, ASICs, custom ICs, chip sets, FPGAs, or reference designs and leverage off the design analysis reuse capabilities of Quantum-SI.

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From Our Customers:

"This is the second generation of Virtex technology where we have collaborated with SiSoft to develop and correlate IBIS-AMI models to reference simulations and hardware.  The combination of these IBIS-AMI models and SiSoft’s QCD provides customers with accurate simulation results at speeds more than 100 to 1000 times faster than traditional simulation methodologies, allowing customers to quickly optimize their designs for cost, reliability and performance.”

 Anthony Torza, senior product marketing manager at Xilinx

 



Xilinx - Second Generation Virtex
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