Signal Integrity Analysis
SiSoft provides a broad range of ASIC and system-level signal integrity design and analysis services, including library creation and validation, pre-layout design and analysis, and post-layout verification.
Typical work includes:
- Working with customers to develop and understand system environment
- Developing critical signal quality checks
- Identify critical timing requirements
- Build libraries (IO buffers, Interconnect, Package, Connectors)
- 2-D/3D electromagnetic modeling
- Pre-/post-layout power system design and analysis
- I/O buffer selection
- Topology and termination definition
- Clock system design/review
- Pre-layout solution space analysis
- Define decoupling strategy
- Uncoupled and coupled analysis with power delivery
- Develop physical and electrical design rules (constraints) for the full system, including the PCBs, packages and IC, as required.
- Post-layout verification
- Power integrity analysis
SiSoft assists its customers throughout the PCB layout process, performing exhaustive rules checks to ensure critical layout guidelines are met.
For simulation, data extraction and results reporting, SiSoft's SI staff uses SiSoft's Quantum-SI software, with either it's internal simulator or HSPICE, to perform signal integrity analysis. Quantum-SI has the most rigorous waveform checking capability in the industry and allows SiSoft's staff to quickly examine the performance of complex systems operating up to multi-gigabit data rates. While Quantum-SI contains a 2D field solver, we also use Ansoft's Q3D and HFSS solvers to model more complex structure as well as SiWave to examine power integrity.