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IBIS Model Generation
IBIS Brochure (PDF)

SiSoft has been involved with the IBIS initiative since its beginning and has established itself as a leader in developing and validating quality IBIS models. We are an active member of the IBIS Open Forum and have a strong commitment to modeling standards.

SiSoft consultants utilize SiSoft's proprietary process, called SiQ, to generate and validate I/O Buffer models to ensure accuracy and quality. SiSoft is typically able to achieve greater than 99 percent correlation between IBIS and HSPICE™ models. SiSoft IBIS modeling process accurately extracts component capacitance and models devices containing on-die termination (ODT) and differential I/O. SiSoft's IBIS models are developed to be portable across IBIS simulation platforms.

IBIS Model Generation Flow        IBIS Model Validation Flow     
To learn more about SiSoft's consulting capabilities, please use the following links:

Technical Staff Interface Experience Quick-Turn SI
Signal Integrity Analysis Crosstalk Analysis Timing Analysis
Technology Assessments SI Design Reviews IBIS Model Generation
Package Design Interconnect Modeling Power Integrity
PCB Design Lab Validation Design Kit Development

To learn more about SiSoft's Training opportunities, please use the following links:

SI Training Methodology and Product Training Jump-Start Training
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