Latest Posts

Understanding Connector and Package Impedance

Author: Donald Telian , SI Guys - Guest Blogger I've grown accustomed to viewing passive interconnect as the road signals drive on. Impedance discontinuities appear as the speed bumps or potholes that make the ride bumpy and unpleasant, if not slower. Perhaps I've looked at too many TDR plots ? For many years our industry has been well-tooled to understand and manage PCB trace impedance , which continues to define the majority of the "road" signals travel on. Over time higher data rates have c...

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Donald Telian, SiGuys - Guest Blogger 12/9/2019 Comments(0)

On Exercising Engineering Judgment

Author: Donald Telian , SI Guys - Guest Blogger Signal Integrity Engineering requires Engineering Judgment. The same thing that makes SI require Creativity causes it to also require above average Judgment; namely that you will consistently be asked to craft clear answers from insufficient data based on ill-defined measures of success. There’s no way around it, Engineering Judgment Required. So we’ll address this topic here in our mini-series on the soft skills required for Signal I...

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Donald Telian, SiGuys - Guest Blogger 11/8/2019 Comments(0)

On Working WITH Your Layout Engineer

Author: Donald Telian , SI Guys - Guest Blogger I have a distant cousin who spent his career doing high-speed PCB layout. At a family gathering we were learning what each other did for a living, and when he learned I’m in Signal Integrity he looked at me warily. I was one of those guys. He then shared how we was going crazy routing, re-routing, and re-routing a high-speed PCB because an SI Engineer was giving him constraints that were impossible to meet. Lots of time wasted, and he was c...

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Donald Telian, SiGuys - Guest Blogger 10/8/2019 Comments(0)

What is Signal Integrity?

Author: Donald Telian , SI Guys - Guest Blogger Great question. Now that I’ve devoted well over 30 years to the field, I’ll venture an answer. My simplistic definition has always been the analog side of digital. I still like that description, because in practice the binary world of ones and zeroes only exists in theory. And, hopefully, in system memory - assuming the interface’s Signal Integrity SI was done correctly. My answer to the question will describe Signal Integri...

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Donald Telian, SiGuys - Guest Blogger 8/5/2019 Comments(0)

The History of IBIS

Author: Donald Telian , SI Guys - Guest Blogger Every time I sit down to simulate a PCB, quickly download IBIS models and produce meaningful results in minutes, I am still amazed. I can’t help but think about how things used to be, back when all this wasn’t possible. Not only were simulators slow and cumbersome, component-level device models simply did not exist. True, there were a few transistor-level models around, but using them made simulation even more slow and cumbersome. There...

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Donald Telian, SiGuys - Guest Blogger 7/11/2019 Comments(0)

DDRx Memory Interfacing

Author: Donald Telian , SI Guys - Guest Blogger Memory. Every system has it. Short-term, long-term, 2 nd level, static, dynamic, EPROM, graphic, internal, cache – but, by far, from an SI perspective the most common memory interface is DDRx. Double-Data Rate DDR memory arrived in the late 1990s, and has remained the dominant interface for decades. It has proven to be extensible and, now in its 5 th generation, DDRx has achieved a 20x increase in bandwidth. DDR memory occupies an impo...

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Donald Telian, SiGuys - Guest Blogger 6/4/2019 Comments(0)