The practice of Signal Integrity increasingly focuses on
managing loss and discontinuities. Each
system struggles with one or the other, making it imperative to determine which
issue is dominant and respond appropriately.
If your interconnect is long, you’ll likely grapple with loss. If it is short and/or modular, minimizing discontinuities
becomes imperative. While “long and
short” are simplifications that track with “loss and discontinuities”
respectively, the challenge of managing their impact on signal integrity
requires a deeper look.
The interplay between loss and discontinuities is
interesting, and often non-intuitive. For
example, when discontinuities are dominant you can introduce loss to dampen
them. Similarly, when loss is dominant
discontinuities have less effect – particularly when they are distant from the
Tx and Rx. Noting that Tx/Rx
equalization mostly targets loss, discontinuities continue to garner increasing
attention. However, in practice, the
dance between loss and discontinuities changes with data rate.
Three factors intertwine loss and discontinuities with data
1. Loss increases
with data rate
2. Size of relevant
discontinuity decreases with data rate
equalization capability improves with data rate
Factors 1 and 2 explain why SI challenges increase with data
rate, while item 3 endeavors to mitigate the problems. But be advised that an efficient EQ solution
for mitigating discontinuities is yet to emerge. In fact, discontinuity mitigation through
design is a more identifiable trend than EQ techniques aimed at the same
problem. SI best practice begins with
eliminating unnecessary discontinuities and then reducing the effects of the
ones that remain (Step
Loss concerns tend to dominate 1 to 10 Gbps signaling due to
less available device EQ and the use of higher-loss materials. Discontinuities are dampened by loss and/or
remain below the relevant
feature size. These data rates cause
us to wake up to managing loss, handling it with device EQ and/or lower-loss
Loss understood and addressed, 10 to 20 Gbps interfaces are
more sensitive to discontinuities. These
data rates force us to think about interconnect elements we used to ignore. Via impedance is now relevant, back-drilling
non-optional, and connector impedances are carefully characterized – each of
these being discontinuities that cause link failures when not managed properly.
For 20-30 Gbps (NRZ) it’s necessary to apply what we’ve
learned at lower data rates and manage both loss and
discontinuities. Regardless of PCB
material chosen, these frequencies push loss back into the realm of concern
(see Figure 2 in Step
2,). Furthermore, via and solder
pads – and even the stubs resulting from how a device’s pin is soldered down – become
discontinuities that must be addressed.
Regardless of data rate and system type, managing the
interplay of loss and discontinuities is necessary to preserve signal integrity. As such, it’s important to determine if your
system leans towards lossy or reflective.
Determining Your System Type
Your SI effort becomes better focused when you determine
which type of system you have: lossy or
reflective (i.e., discontinuity-dominant).
To highlight the difference between the two types of systems, Figure 1 illustrates
their characteristic differences. Even
though the lossy system (blues) is four times longer than the reflective system
(reds), both produce closed eyes – further demonstrating that both issues must
be understood and addressed.
An interconnect’s pulse response (Figure 1, left) is its
fingerprint that reveals its identity, and hence its leaning towards lossy
(blue) or reflective (red). Lossy
interconnects (blue) have a lower-amplitude pulse (at UI 0.0), followed by a slow
and continuous decay that requires multiple UI to return to 0V. Conversely, discontinuities (red) allow
substantial pulse amplitude (400+mV, in this case) followed by reflections that
cause ringing outside the 0.0 volt line for multiple UI. Both channels accumulate significant
interference and pulse spreading into unintended bit times, with each one showing
millivolt level interference beyond 60 UI (X axis tick marks). Quantitatively, eye height is mathematically
reduced by subtracting the pulse response’s difference from 0V at each UI
outside the primary bit (UI 0.0). While a
typical channel’s pulse response may be a blend of these characteristics, these
examples clarify how both problems appear within the interconnect’s fingerprint.
Loss plots (Figure 1, right) provide additional insight into
channel characteristics. Differential
Insertion Loss (IL, darker shades) reveals the lossy channel (blue) has 3x more
loss than the reflective channel (red).
While IL non-linearity (sometimes called “Insertion Loss Deviation”)
suggests the red channel is more reflective, its differential Return Loss (RL,
lighter shades) makes that point quite clear.
RL is a direct measure of reflected energy, showing the reflective
channel (light red) exceeds 10dB around 3 GHz.
In contrast, the lossy channel’s RL (light blue) stays below 16dB at all
frequencies. Note that 10dB is a common
RL metric identifying the frequency where reflections can become problematic.
Figure 1: Loss
(blue) and Discontinuity (red) Channels, Pulse Response and Insertion/Return
While active metrics (e.g., eye opening, BER) are the
ultimate judge of channel performance, the items in Figure 1 and other passive
metrics can guide your channel design.
For example, TDR
plots reveal each discontinuity’s magnitude and location. System design is optimized by using tools to explore,
iterate and manage the effects of loss and discontinuities through studying
these types of plots.
Given the ability to identify and differentiate Loss and
Discontinuities, let’s have a closer look at how they are inter-related.
Trading Loss and Discontinuities
Trends of increasing integration and product miniaturization
continue to shorten interconnects, making the majority of channels more
reflective than lossy. As such, modern link
failures tend to be caused by discontinuities.
How can discontinuities be corrected?
Discontinuities are removed by matching the impedances of the items in
your channel (e.g., traces,
and packages), but sometimes – particularly with connectors – a
discontinuity cannot be removed. As
such, it becomes a feature you must quantify and manage.
One solution for managing discontinuities is not
intuitive: add loss to your system. After decades of trying to minimize loss, in
many cases we have over-achieved and inadvertently maximized the impact of
discontinuities. As such, using low-loss
materials and shortening traces is not always the best choice. Adding loss reduces reflections due to
discontinuities, just as damping reduces ringing.
As an example of using loss to dampen reflections, Figure 2
shows Gen4 PCIe eye height (left) and width (right) margins versus system
implementation options (shown in different colors). Zero margin is the black horizontal line in
each plot, and positive margin increases vertically upward. This is a short 3-PCB system with typical
connector discontinuities between them. This
design scenario allows us to influence two of the PCBs while one is fixed. Route lengths on two PCBs are tested at both
1” (red/green) and 3” (blue/gold), revealing that longer length doubles height
and width margins. What? Let me say that again. Tripling the length doubled the margin. This is not intuitive, yet occurs in numerous
situations when discontinuities dominate loss (page
20). Obviously at some point
increasing length will no longer increase margin, but in this length range the
longer routes offer substantial improvement.
Figure 2: PCIe
Gen4 Eye Height (left) and Width (right) Margins vs Tx Preset and Length/Df
Figure 2 additionally compares the effects of dielectric loss. Adding loss to the 1” lengths (Df: red=0.005,
green=0.02) not only improves margin, but also linearizes performance across Tx
EQ Preset options (X axis). Though PCIe
does not require margin to multiple presets, linearity suggests a more stable
system and immunity to EQ training inefficiency.
Figure 2’s margins for the 3” lengths (blue/gold) illustrate
another phenomenon related to trading loss and discontinuities. Note that the higher loss material (Df:
gold=0.02, blue=0.005) shows better margin in width but not in height. In general, loss limits eye height
(amplitude) while its damping improves eye width (jitter). While eye height and width are inter-related,
this common situation provides opportunity to place the margin where it is
needed most. In this scenario the margin
reversal is not true at the 1” length, yet at the 3” length the higher-loss’
damping starts reducing eye height while still improving the reflective jitter. Choosing the best trade-off between length
and Df requires testing the range of options and engineering
Discontinuity or Impedance?
Another non-intuitive design option is choosing to match a serial
link’s natural impedance instead of its specified impedance. In other words, it can be more important to
minimize discontinuities than achieve a standard impedance at various points
throughout the channel. For example, if a
100 Ohm connector must be used in an 85 Ohm system, consider implementing the
whole system at 100 Ohms. And vice
versa. When a signal path traverses
required discontinuities and then returns to a supposed “correct” impedance,
more discontinuities are created. Allow
yourself the freedom to simply minimize discontinuities, using a good simulator
to explore and validate your choices.
Advancing serial links through generations of data rates
increasingly requires managing – if not trading – loss and
discontinuities. Common metrics help
understand how, and to what extent, the two problems are limiting a channel’s
performance. While device equalization
typically handles loss, discontinuity-induced link failures can be corrected
using non-intuitive solutions such as adding length or loss and adapting
standard impedance values.
SiSoft tools allow you to explore and manage loss and
discontinuities, often offering the next data you need with a simple
right-click. And if the right-click you
need isn’t there, you can add it with user-defined metrics. The tools’ design exploration and analysis capacity
is well-optimized for thousands of pre-layout sweep options and/or post-layout
channels. Furthermore, extensive
post-processing features allow you to quickly sort through simulated data to
find where the problem – or better yet, the solution – is. Learn more by reviewing SiSoft’s extensive published
works and/or product information.