Which Discontinuities are Small Enough to Ignore?

Monday, July 9, 2018

Author: Donald Telian, SI Guys - Guest Blogger

A 60 mil via is too small to worry about, right? And that 20 mil solder pad - the signal certainly won’t “see” that, correct? If you work with high-speed signals, no doubt you’ve asked these questions and someone told you “it depends”. You might have your own rule-of-thumb (RoT) that helps you decide which discontinuities – or “features” – might impact signal quality. In this post I’m going to share my favorite rule-of-thumb related to feature size and demonstrate its use. So read on for an explanation of what you need to pay attention to when, and why. And yes, “small” changes with frequency.

Size, Frequency and High-Speed

When edge rates were 10 nS we had the luxury of simply connecting signals without thinking about high-speed effects. In fact after three dozen years of puzzling over interconnects, my favorite definition of “high-speed” is still: “A net can be considered ‘high-speed’ when you have to do something other than simply connect it.” In other words, something beyond connectivity is required to make the signal work such as length, impedance, termination, timing, equalization and/or all the other things we’ve learned to manage.

In time we learned that if the edge rate is longer than the roundtrip time on the interconnect, a digital signal remains well-behaved. That intuitively makes sense, because the signal rises so slowly it doesn’t “see” imperfections in its path. As such, 12” connections were fine as long as the edge rate was at least 4 nS. Obviously the situation has changed dramatically with 20 pS edge rates on 12” connections. How do we manage the challenges GHz signals have imposed, requiring us to care about even the smallest of features? Why does 30 mils get so much attention? Keep the roundtrip idea in mind because we’re about to re-use it to help answer these questions.


A Useful Rule-of-Thumb (RoT)

In asking others about how they determine relevant feature size, my favorite response was: “any feature smaller than 0.1 UI can be ignored”. While this sounds simple enough, we need to transform time into length to readily apply it. As PCB propagation ranges from 150 to 185 pS/inch, the average conveniently yields 6 mils/pS. So we have:

RoT: Relevant In-line Feature Length >= 0.1 UI ~= 0.1*UI*6mils/pS = 0.6*UI mils (UI in pS)

For example, features larger than 60 mils (=0.6*100) should be carefully managed in 10 Gbps signals. Note the words “in-line”, meaning directly between the Tx and Rx and not a stub.


There are a few reasons why I like this RoT:

  1. It’s simple to remember and easily scales with data rate

  2. It re-uses the familiar edge_rate > feature_roundtrip , because Gbps edge rates are typically 0.2 UI minimum making 0.1 UI features of concern

  3. It agrees with the roundtrip time of Eric Bogatin’s acceptable stub rule-of-thumb, or 0.3/Gbps

Does Simulation Agree?

To test out the RoT I constructed a typical 5” 100 Ohm 10 Gbps channel with a modern Lt/Dk of 0.006, intentionally making it short and lower-loss to accentuate the effects of discontinuities. I then constructed models of discontinuities that varied in impedance +/- 20% (80 and 120 Ohms) – similar to the range a signal encounters at vias and connectors. I inserted one discontinuity into the channel that ranged in size from 10 to 200 mils while holding the overall length constant at 5”. Moving the location of the discontinuity further from the Tx in 1” increments produced the eye height versus discontinuity length plots in Figure 1.


Figure 1: 10 Gbs Eye Height Degradation Versus Discontinuity Length, Placement, and Impedance

Figure 1: 10 Gbs Eye Height Degradation Versus Discontinuity Length, Placement, and Impedance


Figure 1 reveals a few interesting things:
  1. The 60 mil limit (vertical black line) suggested by the RoT represents, in most cases, the knee of the curve. While eye height degradation up to 60 mils is visible in some cases, it stays below 2%. Beyond the 0.1 UI point, eye heights can decrease by ~10% per 0.1 UI.

  2. Eye height degradation increases as we move the discontinuity further from the Tx, as can be seen by comparing it’s placement at 1” (red), 2” (green), 3” (blue), and 4” (black).

  3. For this case, lower impedance discontinuities (darker shades) cause more degradation than higher impedance discontinuities (lighter shades).

Simulating at slower data rates revealed more linear trends, with similar 2% degradation as we approach 0.6*UI mils. Degradation up to 5% at the RoT length was seen at faster data rates (20+ Gbps), confirming the adage that things don’t get simpler as we go faster. Figure 2 plots relevant Discontinuity Length versus Data Rate suggested by the RoT, and illustrates why we’ve been caring about 30 mil features as data rates exceed 16 Gbps.


Figure 2: Relevant Feature Size Versus Data Rate RoT

Figure 2: Relevant Feature Size Versus Data Rate RoT


How Should I Apply This?

Some will say this rule-of-thumb is not strict enough while others will say it is overly conservative, which highlights the fact that it is simply a “rule-of-thumb”. In other words, it gives you a quick way to orient yourself in time and space and know how – and to what degree – to apply your engineering skills. For example, as data rates exceeded 8 Gbps via impedance became consistently relevant in PCB design. Looking at Figure 2, note that this is the data rate where RoT via length traverses the thickness of typical PCBs, or 60 to 120 mils.

As someone who is in SI for the long haul, I often spend time working on items at or below the length suggested by the rule-of-thumb. That’s because as data rates increase, today’s borderline problem is tomorrow’s headache. So it’s best to find a solution while time is on your side. Indeed, history shows that negotiable items at one data rate become requirements in the next (page 3). Pre-working items such as tapered antipad traces (page 11), the removal of serpentine length matching (page 12), and compensating breakout trace impedance (page 23) gave me a chance to traverse the simulate/correlate loop a couple times and find solutions before the issues became problematic.

I believe you’ll find the RoT a convenient metric you can easily apply. Apply it on your next project and see if it’s helpful. You can also use it when jumping between PCBs and packages when mils change to microns (RoT=15*UI um).


In Conclusion

Applying the old edge rate to roundtrip relationship to the modern era, we’ve offered a rule-of-thumb to help you gauge which lengths you should care about – and to what degree. Please comment below and join the discussion by sharing your observations, questions, and rule-of-thumbs you have used to address the question of length versus data rate.

Donald Telian, SiGuys - Guest Blogger 7/9/2018


Response to: Which Discontinuities are Small Enough to Ignore?
Thursday, June 20, 2019
ling niu says:

Discontinuities – or “features” you meaned, necks, vias, pads, or the line through gap area all included? Thank you!

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