"Using Quantum-SI we were able to quickly evaluate the impact of different design implementations and optimize our design," said Mark Hayter, P.A. Semi's chief system architect. "We correlated simulation results to lab measurements and determined that Quantum-SI accurately predicted the system level signal integrity and timing margins allowing us to maximize DDR2 operating speed. We have successfully run the memory system at 533MHz clock / 1066 Mbps data in our lab, and are prepared for when the DDR2-1066 devices are readily available and are standardized by JEDEC".
Quantum-SI accelerates design of high-speed interfaces by integrating timing and signal integrity analysis. Designers are able to use Quantum-SI to define components and routing strategies for different net classes in a high-speed interface. Quantum-SI then performs automated signal integrity analysis and combines the results with interface timing to determine signal integrity and timing margins. This allows designers to quickly evaluate different design tradeoffs and determine their impact on interface timing margins, instead of running multiple analysis tools and manually integrating results. SiSoft offers Quantum-SI design kits for popular interface standards like DDR2 that maximize designer productivity by further reducing the time needed to setup and perform design analysis.
"We think Quantum-SI and Quantum-SI design kits are an ideal fit for P.A. Semi and its customers," noted Barry Katz, SiSoft's president and CTO. "The high-performance embedded computing market demands rapid, cost-effective design. Instead of issuing 'one size fits all' layout rules for complex interfaces such as DDR2, P.A. Semi is enabling its customers to analyze and optimize designs based on their individual requirements for PCB area, layer count, manufacturing cost and performance. This allows P.A. Semi's customers to deploy PWRficient processors in a more cost-effective manner while still having high confidence in the reliability of the finished product."About P.A. Semi™
P.A. Semi develops and delivers the groundbreaking PWRficient™ processor family, the world's most power-efficient high-performance processors ever designed. The PWRficient processor family, based on the Power Architecture™ technology, targets the multibillion-dollar high-performance embedded-computing market and is supported by a comprehensive ecosystem of software tools, application software, operating systems and ODM hardware. The company has headquarters in Santa Clara, Calif., with a design and sales center in Wellesley, Mass. For more information, please visit www.pasemi.com
. About SiSoft™
SiSoft is the leading provider of integrated timing and signal integrity solutions for high-speed digital system design. SiSoft's Quantum-SI products allow users to rapidly determine interface operating margins and achieve High-Speed Design Closure, providing unprecedented accuracy in predicting system-level noise and timing margins. Quantum-SI Interface Analysis Kits are pre-configured analysis setups for popular interface standards that encapsulate both interface architectures and design requirements to accelerate the high-speed design process.
SiSoft's consultants use Quantum-SI tools to provide advanced high-speed consulting services including model development, I/O characterization, package design/analysis and system-level interconnect analysis -- ensuring that SiSoft's signal integrity tools remain at the forefront of high-speed design.
The P.A. Semi and PWRficient names and logos, and combinations thereof, are trademarks of P.A. Semi, Inc. The Power Architecture wordmark and trademark are licensed by Power.org. All third-party trademarks, trade names or service marks are the property of their respective owners.
SiSoft, Quantum-SI, Core-to-Core, TransferNet, High-Speed Timing Closure and High-Speed Design Closure are trademarks of Signal Integrity Software, Inc. All other trademarks are the property of their respective owners.