Maynard, MA and Palo Alto, CA – February 5, 2008 - Signal Integrity Software, Inc. (SiSoft™) and Denali™ Software, Inc., today announced they will co-present “Counting the Picoseconds: Integrating Timing, Signal, and Power Integrity Analysis
”, on Wednesday, February 6, from 2:00PM to 2:40PM at DesignCon 2008 in Santa Clara, CA. This joint presentation focuses on a key challenge in today’s high-speed design industry – the challenge of modeling the effects of timing, power and signal integrity in a truly integrated fashion.
“Increasing design speeds have driven operating margins down into the tens of picoseconds range,” stated Barry Katz, president and CTO of SiSoft. “Combined power/signal integrity analysis is no longer an option – it’s crucial to success.”
“Customers today demand a total solution for DDR memory subsystems, from memory market research to memory controller tuning to a flexible hard PHY to designing and validating IO, package and board designs,” stated Brian Gardner, Denali’s vice president of IP products. “We are pleased to be working with SiSoft, an industry leader in signal integrity design.”
“Only SiSoft’s Quantum-SI™ toolset provides the capability to simultaneously evaluate package and PCB effects with respect to power integrity, crosstalk, topology, termination, and IO drivers, and produce concise signal quality and timing margin reports,” said Barry Katz.
Additionally, SiSoft and Denali experts will both be demonstrating Quantum-SI DDR3 kits with Denali controllers, during the exhibition on the show floor (booth #106 and booth #322). Exhibition hours are from 12:30PM to 6:30PM on both Tuesday and Wednesday, February 5-6. If you are unable to attend DesignCon 2008 and would like additional information, contact via email at: email@example.com
or phone (978) 461-0449, x15.
About Denali SoftwareDenali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry’s most trusted solutions and platforms for deploying PCI Express, NAND and DRAM subsystems. Developers use Denali’s EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Palo Alto, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com
. About SiSoft™
SiSoft™ is the leading provider of integrated timing and signal integrity solutions for high-speed digital system design. SiSoft’s Quantum-SI™ products allow users to rapidly determine interface operating margins and achieve High-Speed Timing Closure, providing unprecedented accuracy in predicting system-level noise and timing margins. Quantum-SI Interface Analysis Kits are pre-configured analysis setups for popular interface standards that encapsulate both interface architectures and design requirements to accelerate the high-speed design process.
SiSoft ensures its tools remain at the forefront of high-speed design by providing advanced high-speed consulting services including model development, I/O characterization, package design/analysis and system-level interconnect analysis. SiSoft design consultants utilize SiSoft’s own commercial software to address some of the industry’s most demanding design problems, helping ensure software product quality and enhancements while driving future development. More information on SiSoft, its products and services can be found at www.sisoft.com
Denali and Denali Software are registered trademarks of Denali Software, Inc. SiSoft, Quantum-SI, Quantum Channel Designer, Core-to-Core, TransferNet, High-Speed Timing Closure and High-Speed Design Closure are trademarks of Signal Integrity Software, Inc. All other trademarks are the property of their respective owners.