SiSoft and IBM Present IBIS-AMI Model Correlation Results


SiSoft to Present IBIS-AMI Model Correlation Results for SerDes Transceivers

Santa Clara, CA – February 4, 2010 - Signal Integrity Software, Inc. (SiSoft™) will be presenting a paper, co-authored with IBM, titled “Predicting BER with IBIS-AMI: Experiences Correlating SerDes Simulations and Measurement”, at both the DesignCon Technical Conference and the DesignCon IBIS Summit today. The paper discusses the effort to create accurate, high-performance, interoperable simulation models for SerDes transceivers. This effort drove the development of the IBIS-AMI modeling standard and resulted in a core set of AMI modeling algorithms that can be configured to represent multiple SerDes technologies and process nodes.

The paper reviews customer requirements for SerDes models and how the IBIS-AMI modeling standard meets those requirements. A strategy for developing a reusable, core set of modeling algorithms to support multiple device families and process nodes is discussed. The methodology used to correlate IBIS-AMI models running in SiSoft’s Quantum Channel Designer™ (QCD) to simulations with IBM’s High Speed Serial Clock Data Recovery (HSSCDR) simulator is then presented along with correlation results. Jitter and noise models employed by the two simulators are presented, as well as a discussion of extrapolating simulation results to predict a link’s operating voltage and timing margins.

“IBM helped drive the IBIS-AMI standard because customers demanded model interoperability,” noted Barry Katz, SiSoft’s President and CTO. “IBM is a leader in SerDes modeling and simulation, with tremendous expertise in correlating simulation to hardware measurement,” said Barry Katz. “The IBIS-AMI standard makes it possible for semiconductor companies to leverage their existing investments in modeling to deliver the standards-based, interoperable models customers demand.” This paper demonstrates the performance and accuracy that IBIS-AMI based analysis can achieve.”

Quantum Channel Designer (QCD) is the Industry’s Premier Channel Simulator for the design and analysis of multi-Gigabit serial links. QCD combines superior support for IBIS-AMI SerDes simulation models with advanced analytical techniques to predict operating voltage and timing margins. SiSoft has worked closely with its Semiconductor Partners to create the largest collection of validated design kits and broadest correlation of any IBIS-AMI simulator. Pre-layout Design Space Exploration lets designers quickly evaluate hundreds of different design tradeoffs to optimize their serial link designs for cost, performance and reliability. QCD Design Kits are currently available for multiple families of IBM ASIC transceivers, including HSS6/Cu065, HSS10/Cu065, HSS11/Cu065, HSS12/Cu045, HSS12C2C/Cu045, HSS15/Cu045, PCI-Express Gen1 and PCI-Express Gen2 cores, with additional design kits in development.

The IBIS Algorithmic Modeling Interface (IBIS-AMI) is a modeling standard for SerDes transceivers that enables fast, accurate, statistically significant simulation of multi-gigabit serial links. IBIS-AMI was developed by a consortium of EDA, Semiconductor and Systems companies and was approved as part of the IBIS 5.0 Specification in August 2008.
SiSoft has been a driving force in IBIS-AMI since its inception in 2006. SiSoft led the definition of the analysis terminology, simulator/model interface, model control (.AMI) file syntax, reference flow and design documents (IBIS BIRDs 104 and 107) that created the specification as it exists today. Unique SiSoft contributions to IBIS-AMI include:
  • First public simulation toolkit & reference models
  • First IBIS-AMI models developed & delivered under contract
  • First to publish IBIS-AMI performance & correlation data
  • First commercial release of a fully IBIS-AMI compliant channel simulator
  • First to support both Statistical & Time-Domain simulation using IBIS-AMI models
For more info on SiSoft’s role in the IBIS-AMI Modeling Standard visit

About SiSoft™
SiSoft™ provides award-winning EDA simulation software, methodology training and consulting services for system-level high-speed design. Quantum Channel Designer™ is the Industry’s Premier Channel Simulator for the design and analysis of multi-Gigabit serial links and a DesignVision 2009 Award Winner. Quantum-SI™ is the leading solution for integrated signal integrity, timing and crosstalk analysis of high-speed parallel interfaces. SiSoft’s software products automate comprehensive pre- and post-route analysis of high speed interfaces, detailing a design’s operating voltage and timing margins. Design Space Exploration lets designers explore hundreds of design tradeoffs automatically, quickly optimizing designs for cost, reliability and performance.

SiSoft’s staff of recognized industry experts keeps SiSoft’s products at the forefront of high-speed design by using them every day to perform state-of-the-art design and analysis. SiSoft provides a full range of model development, design analysis and methodology training services. SiSoft’s consultants can analyze your high-speed design for you, or provide the tools and training you need to perform high-speed design analysis in-house.

More information on SiSoft can be found at