SiSoft at DesignCon 2020

10/31/2019

Jan 28-30, 2020
Santa Clara, CA
Santa Clara Convention Center

 

What we will be talking about in the booth

Visit SiSoft and MathWorks in booth #935 and learn about exciting new developments in the areas of signal integrity, SerDes, and Mixed-Signal design. Don’t miss the opportunity to participate in the SerDes Toolbox Challenge and Mixed-Signal Blockset Challenge.

We will be talking about design of high-speed DDR5 and PAM4 interfaces using the integrated workflow between MathWorks SerDes Toolbox and SiSoft QSI/QCD for channel simulation and IBIS-AMI modeling. In addition, come learning about the design of mixed-signal systems, PLLs, ADCs, DACs and more with Simulink and Mixed-Signal Blockset.

 
 
 

Highlighted Presentations

 

Wednesday, January 29 | 9:00am - 9:45am

DfA (Design for AMI): A New Integrated Workflow for Modeling 56G PAM4 SerDes Systems

Speakers: Ravindra Rudraraju (Intel), Richard Allred (Mathworks), Barry Katz (Mathworks), Jonggab Kil (Intel), Tripp Worrell (Mathworks), Walter Katz (Mathworks), Vijay Kasturi (Intel)

Location: Ballroom E

Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design

Format: Technical Session

Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass

 

Wednesday, January 29 | 3:45pm - 5:00pm

Panel – Succeeding with Next-Generation AMI Models & Analysis

Speakers: Donald Telian (SiGuys), Ken Willis (Cadence), Stephen Scearce (Cisco), Walter Katz (MathWorks), Hsinho Wu (Intel), Justin Butterfield (Micron)

Location: Ballroom D

Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design

Format: Panel Discussion

Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass

 

Thursday, January 30 | 9:05am - 9:45am

Best Practices for Modeling SerDes Systems and Improving IBIS-AMI Correlation

Speakers: Giorgia Zucchelli

Location: Room 203

Track: Sponsored Session